High End Workshop
Hardware Assisted Security for Fog Computing based IoT Networks

Under the KARYASHALA Scheme – A SERB initiative

11th – 17th July 2022

Funded by: Science and Engineering Research Board (SERB),
Department of Science and Technology, Government of India, under the Accelerate Vigyan Scheme

Organized by: Dhirubhai Ambani Institute of Information and Communication Technology

Workshop Schedule

Important Dates

Registration Opens: 13th June 2022
Last date for Application: 05th July 2022
Display of shortlisted candidates: 06th July 2022
Workshop Dates: 11th July 2022
कार्यशाला (High - End Workshops) Objectives:

'KARYASHALA' is a noble endeavor of Government of India by Science and Engineering Board (SERB) under Accelerate Vigyan Scheme to improve research productivity of promising PG and PhD students from universities and colleges through high-end workshops on specific themes. This program aims to provide opportunities to acquire specialized research skills. These workshops will primarily be facilitated at organizations / institutions / laboratories of national importance.
DA-IICT Gandhinagar has decided to be a part of this unique initiative and share our Institutional resources with the society towards higher goals of national importance. Thus, the current workshop has come into being. This event is sponsored by SERB.

Sponsored By:

About the Workshop

The current high-end workshop can be highly beneficial to students and researchers working in the area of VLSI, Embedded systems, Computer Architecture, Hardware Security, Cloud/Fog Computing, HDL – Verilog, FPGA. The workshop aims to provide opportunities to acquire specialized research skills.

Following are the objectives of the present workshop

Basics of VLSI Design and Testing.

Provide an understanding of the fundamentals of Hardware Security.

Impart knowledge about basics of IoT and Fog Computing along with security issues in the IoT paradigm.

Enable participants to gain insight into various aspects of Hardware Security like Hardware Trojan Detection, Prevention and Logic Locking.

Familiarize participants with concepts of Hardware Security Modules and Physically Unclonable Functions in IoT applications.

Provide hands on training for circuit simulation and implementation on FPGA.

About Gandhinagar

With the tag of the cleanest city in Asia, Gandhinagar is the administrative capital of the state of Gujarat, located on the western bank of Sabarmati river. Named after the father of Nation, Mahatma Gandhi, Gandhinagar is the second planned city of India, after Chandigarh. The city is divided into thirty organised sectors, each of them is pedestrian friendly and self-contained. It's more of a people-oriented city, with all the parks, monuments, gardens and grand civic buildings. During monsoon season, i.e., when the workshop is scheduled, it is good climate with temperature ranging between 30 to 40 °C.

Explore Gandhinagar

Who Can Attend

Workshop is open to postgraduate students/research scholars from all Institutes and universities. Preference will be given to the students having interest towards VLSI, Embedded Systems, Computer Architecture, Hardware Security, Cloud/Fog Computing, HDL – Verilog, FPGA implementation. Total number of seats is limited to 25.The participants will be selected based on their academic/research credentials and first-come-first-serve basis.
The selected applicants will be provided free accommodation and fooding at DA-IICT. Also, the traveling expenses (3 AC) will be reimbursed.

There is no registration fees.